1. Field of the Invention
The present invention pertains to the field of electrochemical reactors and, particularly, to their use in electroplating metal films on wafers for use in making integrated circuits. More specifically, a specialized mask or shield is used to vary the electric field at the wafer during the electroplating operation to increase a uniformity of thickness in the layer being deposited.
2. Statement of the Problem
Integrated circuits are formed on wafers by well known processes and materials. These processes typically include the deposition of thin film layers by sputtering, metal-organic decomposition, chemical vapor deposition, plasma vapor deposition, and other techniques. These layers are processed by a variety of well known etching technologies and subsequent deposition steps to provide a completed integrated circuit.
A crucial component of integrated circuits is the wiring or metalization layer that interconnects the individual circuits. Conventional metal deposition techniques include physical vapor deposition, e.g., sputtering and evaporation, and chemical vapor deposition techniques. Some integrated circuit manufacturers are investigating electrodeposition techniques to deposit primary conductor films on semiconductor substrates.
Wiring layers have traditionally been made of aluminum and a plurality of other metal layers that are compatible with the aluminum. In 1997, IBM introduced technology that facilitated a transition from aluminum to copper wiring layers. This technology has demanded corresponding changes in process architecture towards damascene and dual damascene architecture, as well as new process technologies.
Copper damascene circuits are produced by initially forming trenches and other embedded features in a wafer, as needed for circuit architecture. These trenches and embedded features are formed by conventional photolithographic processes. A barrier layer, e.g., of tantalum or tantalum nitride, is next deposited. An initial seed or strike layer of copper about 125 nm thick is then deposited by a conventional vapor deposition technique. Thickness of this seed layer may vary and it is typically a thin conductive layer of copper or tungsten. The seed layer is used as a base layer to conduct current for electroplating thicker films. The seed layer functions as the cathode of the electroplating cell as it carries electrical current between the edge of the wafer and the center of the wafer including fill of embedded structures, trenches or vias. The final electrodeposited thick film should completely fill the embedded structures, and it should have a uniform thickness across the surface of the wafer.
Generally, in electroplating processes, the thickness profile of the deposited metal is controlled to be as uniform as possible. This uniform profile is advantageous in subsequent etchback or polish removal steps. Prior art electroplating techniques are susceptible to thickness irregularities. Contributing factors to these irregularities are recognized to include the size and shape of the electroplating cell, electrolyte depletion effects, hot edge effects and the terminal effect and feature density.
The seed layer initially has a significant resistance radially from the edge to the center of the wafer because the seed layer is initially very thin. This resistance causes a corresponding potential drop from the edge where electrical contact is made to the center of the wafer. These effects are reported in L. A. Gochberg, xe2x80x9cModeling of Uniformity and 300-mm Scale-up in a Copper Electroplating Toolxe2x80x9d, Proceedings of the Electrochemical Society (Fall 1999, Honolulu Hawaii); and E. K. Broadbent, E. J. McInerney, L. C. Gochberg, and R. L. Jackson, xe2x80x9cExperimental and Analytical Study of Seed Layer Resistance for Copper Damascene Electroplatingxe2x80x9d, Vac. Sci. and Technol. B17, 2584 (November/December 1999). Thus, the seed layer has a nonuniform initial potential that is more negative at the edge of the wafer. The associated deposition rate tends to be greater at the wafer edge relative to the interior of the wafer. This effect is known as the xe2x80x98terminal effect.xe2x80x99
One solution to the end effect would be to deposit a thicker seed layer having less potential drop from the center of the wafer to the edge, however, thickness uniformity of the final metal layer is also impaired if the seed layer is too thick. Another alternative is to have a seed layer that is thicker in the center than at the edge. However, necking of the seed layer in the thicker area may cause filling problems. FIG. 1 shows a prior art seed layer 100 made of copper formed atop barrier layer 102 and a dielectric wafer 104. A trench or via 106 has been cut into wafer 104. Seed layer 100 thickens in mouth region 108 with thinning towards bottom region 110. The thickness of seed layer 100 is a limiting factor on the ability of this layer to conduct electricity in the amounts that are required for electroplating operations. Thus, during electrodeposition, the relatively thick area of seed layer 100 at mouth region 108 can grow more rapidly than does the relatively thin bottom region 110 with the resultant formation of a void or pocket in the area of bottom region 110 once mouth region 108 is sealed. This is particularly true when bottom-up filling chemistries are not employed or other mitigating factors prevent bottom-up filling chemistries from producing void-free features.
FIG. 2 shows an ideal seed layer 200 made of copper formed atop barrier layer 202 and a dielectric wafer 204. A trench or via 206 has been cut into wafer 204. Ideal seed layer 200 has three important properties:
1. Good uniformity in thickness and quality across the entire horizontal surface 208 of wafer 204;
2. Excellent step coverage exists in via 206 consisting of continuous conformal amounts of metal deposited onto the sidewalls; and
3. In contrast to FIG. 1, there is minimal necking in the mouth region 210. It is difficult or impossible to obtain these properties in seed layers having a thickness greater than about 120 nm to 130 nm over features smaller than 0.15 xcexcm.
The electroplating of a thicker copper layer should begin with a layer that approximates the ideal seed layer 200 shown in FIG. 2. The electroplating process will exacerbate any problems that exist with the initial seed layer due to increased deposition rates in thicker areas that are better able to conduct electricity. The electroplating process must be properly controlled or else thickness of the layer will not be uniform, there will develop poor step coverage, and necking of embedded structures can lead to the formation of gaps of pockets in the embedded structure.
A significant part of the electroplating process is the electrofilling of embedded structures. The ability to electrofill small, high aspect ratio features without voids or seams is a function of many parameters. These parameters include the plating chemistry; the shape of the feature including the width, depth, and pattern density; local seed layer thickness; local seed layer coverage; and local plating current. Due to the requisite thinness of the seed layers, a significant potential difference exists between the metal phase potential at the center of a wafer and the metal phase potential at the edges of a wafer. Poor sidewall coverage in embedded structures, such as trench 106 in FIG. 1, develops higher average resistivity for current traveling in a direction that is normal to the trench. See S. Meyer et al., xe2x80x9cIntegration of Copper PVD and Electroplating for Damascene Feature Electrofillingxe2x80x9d Proceeding of Electrochemical Society, Session on Interconnects and Contact Metallization Symposium (Fall 1999, Honolulu Hawaii). Due to these factors in combination, there is a finite range of current densities over which electrofilling can be performed. If the electrical resistivity is too large in the metal phase, it may be impossible to fill a structure at the wafer center without using the present invention.
Manufacturing demands are trending towards circumstances that operate against the goal of global electrofilling of embedded structures and thickness uniformity. Industry trends are towards thinner seed films, larger diameter wafers, increased pattern densities, and increased aspect ratio of circuit features. The trend towards thinner seed layers is required to compensate for an increased percentage of necking in smaller structures, as compared to larger ones. For example, FIG. 3 shows a comparison between etched versus seeded features for a Novellus Systems Inc. HCM PVD process. A 45xc2x0 line is drawn to show no necking, but the data shows necking as the seeded feature width rolls downward in the range from 0.3 xcexcm to 0.15 xcexcm.
Regarding the trend towards larger diameter wafers, it is generally understood that the deposition rate, as measured by layer thickness, can be maintained by scaling total current through the electrochemical reactor in proportion to the increased surface area of the larger wafer. Thus, a 300 mm wafer requires 2.25 times more current than does a 200 mm wafer. Electroplating operations are normally performed by using a clamshell wafer holder that contacts the wafer only at its outer radius. Due to this mechanical arrangement, the total resistance from the edge of the wafer to the center of the wafer is independent of the radius. Nevertheless, with the higher applied current at the edge of the larger wafer, which is required to maintain the same current density for process uniformity, the total potential drop from the edge to the center of the wafer is greater for the larger diameter wafer. This circumstance leads to an increased rate of deposition (layer thickness) with radius. While the problem of increasing deposition rate with radius exists for all wafers, it is exacerbated in the case of larger wafers. At sufficiently large wafer sizes, the difference in current density at the center versus the edge will lead to incomplete fill at one of those locations.
U.S. Pat. No. 4,469,566 to Wray teaches electroplating of a paramagnetic layer with use of dual rotating masks each having aligned aperture slots. Each mask is closely aligned with a corresponding anode or cathode. The alternating field exposure provides a burst of nucleation energy followed by reduced energy for a curdling effect. The respective masks and the drive mechanism are incapable of varying the distance between each mask and its corresponding anode or cathode, and they also are incapable of varying the mask surface area of their corresponding anode or cathode.
U.S. Pat. No. 5,804,052 to Schneider teaches the use of rotating roller-shaped bipolar electrodes that roll without short circuit across the surface being treated in the manner of a wiper.
None of the aforementioned patents or articles overcome the special problems of electroplating metal films for use in integrated circuits or more generally, where the electrical resistance in an underlying conductive layer changes as the layer grows and where the deposited film thickness must be uniform. There exists a need to compensate the potential drop in the seed layer to facilitate uniform electroplating and electrofilling of metalization or wiring layers for integrated circuits.
The present invention overcomes the problems that are outlined above by providing a time variable field shaping element, i.e., a mask or shield, that is placed in the electrochemical reactor to compensate for the potential drop in the seed layer. The shield compensates for this potential drop in the seed layer by shaping an inverse resistance drop in the electrolyte to achieve a uniform current distribution.
Method and apparatus of the invention involves an electrochemical reactor having a variable field-shaping capability for use in electroplating of integrated circuits. The electrochemical reactor includes a reservoir that retains an electrolytic fluid. A cathode and an anode are disposed in the reservoir to provide an electrical pathway through the electrolytic fluid. A wafer-holder contracts one of the anode and the cathode. A selectively actuatable shield is positioned in the electrical pathway between the cathode and the anode for varying an electric field around the wafer-holder during electroplating operations.
The shield can have many forms. A mechanical iris may be used to change the size of the aperture or a strip having different sizes of apertures may be shifted to vary the size of aperture that is aligned with the wafer. The shield may be raised and lowered to vary a distance that separates the shield from the wafer. The wafer or the shield may be rotated to average field inconsistencies that are presented to the wafer. The shield may have a wedge shape that screens a portion of the wafer from an applied field as the wafer rotates. The shield may also be tilted to present more or less surface area for screening effect.